• Adjustable I/O voltages via on-board regulators.
    • 3 separate banks individually configurable to +1.5V to +3.3V
  • Power status LEDS: +12V, +5V, +3.3V
  • With 300-pin connector:
    • Two Mictor connectors: 24 single-ended signals each
    • 20-pin header: 8 pairs LVDS or 16 single-ended signals + 4 grounds
    • 40-pin header: 18 pairs LVDS or 36 single-ended signals + 4 grounds
    • Two External clocks: GCA and GCB (SMAs)
      • Input to motherboard for externally applied clock or
      • Monitoring clocks from motherboard
    • External clock MGTCLK
      • Differential SMAs
    • External clock input GCC
      • Resistor selectable source:
        • FPGA-generated from motherboard
        • On-board oscillator
        • SMAs
    • 3 RocketIO channels accessible via Samtec QSE connector
      • differential RX/TX pairs
    • 1 RocketIO channel via SMAs (Rx/Tx)

  • With 400-pin connector add:
  • 40-pin header: 12 pairs LVDS or 24 single-ended signals + 4 grounds
  • 40-pin header: 18 pairs LVDS or 36 single-ended signals + 4 grounds

  • Product Brief - [PDF - 1.09MB]
  • DNMEG_Obs Manual - [PDF - 114KB]
  • Block Diagram - [PDF - 93KB]
  • Source Files: Schematic, Gerber, Assembly Drawings, Netlist, and more - [ZIP - 2.52MB]
  • MEG Array Daughter Card Interface Description [PDF - 660KB]
  • Daughter Card Compatibility Guide [PDF - 63KB]
  • QL5064_INTERFACE Module Description and Usage [PDF - 357KB]
  • Downloads Page

 

DNMEG_Obs
Dini Group MEG Array
Observation Daughtercard

The DNMEG_Obs Observation Daughter card is a complete solution for observation of signals on a 300-pin or 400-pin FCI MEG-Array connector and is used with the DN8000K10, DN7000K10PCI, and other FPGA-based products from The DINI Group. This daughter card enables the observation of nearly 150 signals via SMAs, Samtec QSEs, IDC, and Mictor connectors. Cables can be attached to these connectors for communication to/from off-board peripherals. Three separate linear regulators can be configured via resistors to control the I/O voltage (+1.5V to +3.3V) of the host FPGA bank. An on-board oscillator enables clock generation and routing back to the host board.

The DNMEG_Obs comes in a 300-pin and 400-pin version. The two connectors are not cross compatible, meaning you cannot plug the 300-pin version into a 400-pin host connector.

Ordering information:
300-pin: DNMEG_obs_300
400-pin: DNMEG_obs_400