Reference design memory map:
BAR1 is 256 MB - SDRAM
BAR0 is 8 MB - everything else:

0x000000 - 0x00ffff version number and other registers:
		0x0 - read version number
		0x4 - DRAM upper address register
		0x8 - read clock speeds
		0xc - DCM phase-shift registers
0x010000 - 0x01ffff daughtercard test data for CON1
0x020000 - 0x02ffff daughtercard test data for CON2
0x030000 - 0x03ffff daughtercard test data for CON3
0x040000 - 0x05ffff multiplier data
0x060000 - 0x07ffff SDRAM EEPROM data
0x080000 - 0x0fffff blockram
0x100000 - 0x1fffff sample readback registers
0x200000 - 0x3fffff SSRAM 1
0x400000 - 0x5fffff SSRAM 2
0x600000 - 0x7fffff SSRAM 3